37.044525 a bidirect data
7.095598 thi bu carri both instructon
96.33318 the separ data
0.4308215 the risc processor
7.531769 the processor input instruct
15.205969 the novel interfac
26.701323 the implement of featur
54.731438 the bidirect data bu
49.40511 statu report
76.29787 processor output address
5.498772 processor output
73.898094 instruct transfer
47.272545 instruct signal
66.16725 instruct buse
40.980488 independ buse
82.47265 high transfer rate at a reason 
74.16466 high perform processor interfac
64.45797 data access signal
45.8808 coupl the processor
72.016106 concurr data
5.850648 chip memori
0.5558758 burst mode processor protocol 
88.91149 bu structur
37.279697 bu statu
60.42563 address bu
47.551624 a signal path
49.38311 a set of devic
35.671955 a processor input instruct
21.924778 a high perform interfac betwee
